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Reliability Analysis of Digital CMOS Circuits Taking into Account Degradation Effects of Transistors
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The logic and timing analysis problems for design and optimization of VLSI IP-blocks have been considered. A new logic-timing simulation approach, which uses the interval estimation, has been proposed for CMOS circuits. The proposed approach unites two opposite methods of the timing analysis, such as the critical path search and input stimulus simulation. The interval approach has been chosen due to considerable variation increasing effect for the nanometer elements performance analysis.
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The problems of the statistical analysis of complex functional blocks have been considered. The methods of the statistical analysis and the simulation speedup have been analyzed. The approach, that allows a considerable reduction of the computational costs during the statistical simulation of the complex functional blocks, has been proposed. The proposed approach is based on using the models of the circuit functional parameters, which are calculated as the quadratic forms with the rank 1 matrix. The comparative analysis results are shown for the cases when the linear regression and the least-squares regression are used during the degeneration of the models for the functional parameters of the complex functional blocks.
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The problems of the standard cell libraries simulation and characterization designed on the basis of the deep semiconductor CMOS technologies of the submicron and nanometer level have been considered. The methods for accelerating the characterization process, providing the identification of parameters for the macro-models of logic elements during multiple simulation of the elements on the circuit engineering level for different input impacts and different values of technological parameters and operating condition have been analyzed. The optimal characterization grid search algorithms have been proposed for the purpose of computational resources reduction under the required macro-model accuracy control. The comparison results for different modes of the proposed algorithms have been presented.
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