Persons

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The CMOS SOI technology is perspective for creating variety nomenclature of radio-frequency (RF) analog-digital transceiver integrated circuits, including hardware. Testing results of designing and studies for the library RF elements and the set of the functional blocks designed to domestic CMOS SOI 180 nm technology have been presented. The library of the elements includes the RF n-channel MOSFETs with the cut-off frequency up to 30 GHz, MOSFET based varactors, spiral inductors, MIM capacitors, resistors and RF transceiver IP-blocks, such as amplifiers, voltage control oscillators, frequency dividers with the operating frequencies in the range from 0.1 to 4 GHz. The resistance of the IP-blocks hardness to the total ionizing dose exposure is not less than 3 · 10 au. No SEL or catastrophic failures were observed under the impact of heavy charged particles with the linear energy transfer up to 80 MeV·cm/mg. The study results have confirmed the possibility to create the transceiver ICs for the space applications with the working frequencies up to 3 GHz 180 nm CMOS SOI technology.

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The traditional approaches to the circuit simulation of the single-event effects in CMOS ICs are based on the use of the double-exponential model of ionization current pulse, which is not always applicable to devices with the sub-100 nm feature sizes. An overview of the main approaches to solving two main problems, arising in the circuit simulation of the single-event effects in sub-100 nm CMOS ICs: the dynamic interaction between the charge collection process and the fast circuit response and the impact of the charge collection by multiple sensitive nodes- has been presented. As a solution of the first problem, three main approaches have been considered, based on the use of, respectively, a piecewise linear current pulse shape based on TCAD simulation results, a dual double-exponential current source and a bias-dependent current source. The methods for circuit simulation of the ionization response of several elements from single HCP based on using the look-up tables and analytical models of the ionization response dependence on the particle hit place have been considered. The performed analysis of the up-to-date approaches to simulation of the failure effects and ionization noise pulses in CMOS microcircuits permits to conclude that the most flexible and physically precise approach is that one based on using the current source, taking into account the electric mode of the transistor and being built to the Verilog-A code of the initial model.

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The conventional programs permit to simulate the CMOS-microchips considering the influence of cosmic rays in active elements. However, the usage of such programs in simulation of the microchips considering the influence of the Single Event Effects (SEE) is ineffective mainly because of complexity of equivalent schemes, which describe SEE. The description technique, offered by the authors, uses the П-type approximation of real ionization currents in p/n-junctions. It enables to set these currents as the initial data. The approximated values of currents are computed using TCAD Sentaurus for a standard set of elements and are stored as a library. In simulation of SEE in CMOS-microchips with the automatically generated topology, based on the functional library, two types of labels are used, which are assigned to the library elements (LE). The labels of the first type are assigned permanently to all LE during creation of the library. The labels of the second type are used during the microchip functional description. The approach, which has been considered, simplifies the work of the most frequently used synthesizers, which permits to manipulate the library elements. Such method simplifies the work of the most frequently used synthesizers, which permits to manipulate LE. The subjective factor in choosing the labels for LE is justified while searching for <<weak>> spots in the microchip structure and in evaluation of the CMOS-microchip reaction to SEE at those spots.

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