The traditional approaches to the circuit simulation of the single-event effects in CMOS ICs are based on the use of the double-exponential model of ionization current pulse, which is not always applicable to devices with the sub-100 nm feature sizes. An overview of the main approaches to solving two main problems, arising in the circuit simulation of the single-event effects in sub-100 nm CMOS ICs: the dynamic interaction between the charge collection process and the fast circuit response and the impact of the charge collection by multiple sensitive nodes- has been presented. As a solution of the first problem, three main approaches have been considered, based on the use of, respectively, a piecewise linear current pulse shape based on TCAD simulation results, a dual double-exponential current source and a bias-dependent current source. The methods for circuit simulation of the ionization response of several elements from single HCP based on using the look-up tables and analytical models of the ionization response dependence on the particle hit place have been considered. The performed analysis of the up-to-date approaches to simulation of the failure effects and ionization noise pulses in CMOS microcircuits permits to conclude that the most flexible and physically precise approach is that one based on using the current source, taking into account the electric mode of the transistor and being built to the Verilog-A code of the initial model.
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