Persons

The models of electro-physical effects built-into Sentaurus TCAD have been tested. The models providing an adequate modeling of deep submicron high-k MOSFETs have been selected. The gate and drain leakage currents for 45 nm MOSFET with PolySi gate and SiO, SiO/HfO and HfO gate dielectrics have been calculated using TCAD. It has been shown that the replacement of traditional SiO gate by an equivalent HfO dielectric considerably reduces the gate leakage current by several orders due to elimination of the tunneling effect influence. Besides, the threshold voltage, saturation drain current, mobility, transconductance, etc. degrade within 10-20% range.

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The macromodel BSIMSOI-RAD for the transistor-level simulation of SOI/SOS CMOS IC's and the procedure for the determination of the macromodel parameters have been described. Some examples of its application for the analysis of estimating the radiation hardness of CMOS IC fragments have been presented.

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The three-dimensional device simulation results of the radiation induced leakage currents in submicron partially depleted n-channel MOS transistor on the MOSFET insulator have been presented.

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