The models of electro-physical effects built-into Sentaurus TCAD have been tested. The models providing an adequate modeling of deep submicron high-k MOSFETs have been selected. The gate and drain leakage currents for 45 nm MOSFET with PolySi gate and SiO, SiO/HfO and HfO gate dielectrics have been calculated using TCAD. It has been shown that the replacement of traditional SiO gate by an equivalent HfO dielectric considerably reduces the gate leakage current by several orders due to elimination of the tunneling effect influence. Besides, the threshold voltage, saturation drain current, mobility, transconductance, etc. degrade within 10-20% range.
Dmitriy A. Popov
National Research University Higher School of Economics, Moscow, Russia
Igor A. Kharitonov
National Research University «Higher School of Economics» (Moscow Institute of Electronics and Mathematics)
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