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The JFET compact models used in commercial versions of SPICE-like software tools are oriented only to the standard range of –60 °C…+150 °C and are not suitable for simulation the electronic circuits in the range of cryogenic temperatures (below –120 °C). In the work the JEFT Low-T model, suitable for calculation of circuits in an extended temperature range, including the cryogenic ones (–200…+110 °C) has been developed. The model takes into account the changes in the I-V-characteristics due to the effect of the ultra-low temperature: an increase in the saturation voltage VDsat, a decrease in the pinch-off current Ip and the transconductance BETA, a negative slope LAMBDA on the output I-V-characteristics, an increase in the drain-source resistance RD due to the freeze-out effect, etc. For this purpose, the dependencies of the listed parameters on temperature have been additionally introduced. A procedure has been developed for extracting the SPICE-parameters of the JFET Low-T model from the results of measurements of a standard set of I-V-characteristics in the cryogenic temperature range. The error in simulation of the I-V-characteristics does not exceed 10–15% in the –200…+110 °C temperature range.
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