Persons

The process and device simulation tools features have been analyzed. The tools have been analyzed applied to the calculation of electrical characteristics for various integrated circuit devices, operating in different external conditions. The model features having the maximum effect on the simulation results have been revealed.

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Self-heating effects and heat sink problems in lateral power SOI-MOSFET's have been studied. Using the process and device simulation TCAD tools the output characteristics and safe operation area have been simulated. It has been shown that the safe operation area limitations to higher extent are related with the structure self-heating than with the parasitic bipolar transistor turning on.

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The lateral junctionless MOSFET’s have a number of advantages compared to the conventional devices based on SOI structure. During the process of fabricating SOI structure and further technological operations of fabricating transistors, the change of the silicon film thickness is possible. In the work, using the device-technological modeling in the TCAD system the results of the studies on the influence of the SOI structure silicon film thickness on the main JLT parameters have been presented. It has been shown that to compensate the degradation of the device characteristics while changing the silicon film thickness it is necessary, respectively, to change the impurity concentration in silicon. For this, with the silicon film thicknesses less than 45 nm the level of the silicon film doping by the impurity higher than 10 cm is necessary.

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