Persons

The GaN based devices with respect to most parameters exceed the devices based on traditional semiconductor materials. The AlGaN-transistors are the devices, operating in the depletion mode. For most applications it is necessary to implement the operating mode E , when the current in the channel is closed at zero gate voltage. In this paper the novel method namely using the p -GaN layer under the gate has been considered. The plasma-chemical removal of p -GaN layer in the non-gated active region has been chosen as a formation method of this layer. In this case the challenges, namely the non-uniformity in the depth of etching and poor control of the etching rate, arise. To exclude these problems, the heterostructures with additional AlN barrier layer has been developed. The research results of the heterostructure parameters affecting the carrier concentration in the channel, and, respectively, the transistor output characteristics have been presented and the developed design process has been shown. According to it the normally-off transistors have been formed. The maximum drain current in the open state is 350 mA/mm at 4 V gate voltage and the breakdown voltage is about 550 V in closed state at 0 V gate voltage.

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The techniques for forming the nanoscale elements of gate of the power microwave transistor, based on the AlN/GaN heterostructures, have been developed. The optimal parameters of exposure of 950-polymethylmethacrylate (PMMA) and ELP-20 have been defined. The technological route of ion beam lithography using the multilayer resists has been developed and investigated. The technology for creating the grounded continuous metal mesh of the alignment marks above the resist, sensitive to ions, for visualizing the alignment marks on the dielectric substrate by ion microscopy method has been completed.

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The method for fabrication of HEMTs, in which T-gate is formed using the nanoimprint lithography technology, has been presented. The characteristics of the created GaAs pHEMT transistors have been investigated. The developed transistor has the gate base length of 250 nm order and maximum transconductance over 350 mS/mm, the current-gain cutoff frequency ( f ) and maximum oscillation frequency ( f ) of 40 and 50 GHz, respectively.

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