1. Morales E., Herrera R. Video processing in real-time in FPGA // Proc. SPIE. Optics and Photonics for Information Processing XII. 2018. Vol. 10751. Art. ID: 107510Z. https://doi.org/10.1117/12.2322021
2. FPGA-based research on high frame rate infrared image real-time acquisition and processing system / S. He, Y. Zhou, S. Lin et al. // Proc. SPIE. Seventh Symposium on Novel Photoelectronic Detection Technology and Application 2020. 2021. Vol. 11763. Art. ID: 117632T. https://doi.org/10.1117/12.2586419
3. Nian T.-K., Chondro P., Ruan S.-J. A low complexity detection method for video data discontinuity implemented on SoC-FPGA by using pixel location prediction scheme // Multimed. Tools Appl. 2020. Vol. 79. P. 22261–22276. https://doi.org/10.1007/s11042-020-09021-2
4. Шариков А. И., Шарикова Е. М. ПЛИС-система выделения ключевых точек при обработке изображений // Изв. вузов. Электроника. 2018. Т. 23. № 5. С. 495–501. https://doi.org/10.24151/1561-5405-2018-23-5-495-501
5. Kumar A., Zhang Z. J., Lyu H. Object detection in real time based on improved single shot multi-box detector algorithm // J. Wireless Com. Network. 2020. Vol. 2020. Art. No. 204. https://doi.org/10.1186/s13638-020-01826-x
6. A real-time object detection algorithm for video / S. Lu, B. Wang, H. Wang et al. // Computers & Electrical Engineering. 2019. Vol. 77. P. 398–408. https://doi.org/10.1016/j.compeleceng.2019.05.009
7. Batra V., Kilgard M. J., Kumar H., Lorach T. Accelerating vector graphics rendering using the graphics hardware pipeline // ACM Transactions on Graphics. 2015. Vol. 34. Iss. 4. Art. No. 146. https://doi.org/10.1145/2766968
8. GPU acceleration of the most apparent distortion image quality assessment algorithm / J. Holloway, V. Kannan, Y. Zhang et al. // J. Imaging. 2018. Vol. 4. Iss. 10. Art. No. 111. https://doi.org/10.3390/jimaging4100111
9. Zhang Y., Yang X., Wu L., Andrian J. H. A case study on approximate FPGA design with an open-source image processing platform // 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). Miami, FL: IEEE, 2019. P. 372–377. https://doi.org/10.1109/ISVLSI.2019.00074
10. SMPTE ST 2110 compliant scalable architecture on FPGA for end to end uncompressed professional video transport over IP networks / N. Ranasinghe, R. Bangamuarachchi, J. Seneviratne et al. // 2019 IEEE 30th International Conference on Application-Specific Systems, Architectures and Processors (ASAP). New York, NY: IEEE, 2019. P. 235–238. https://doi.org/10.1109/ASAP.2019.00012