1. Zeng L., Xu L.-T., Zhu M. Line edge roughness reduction in high aspect ratio carbon hardmask patterning for slit trench. In: 2024 Conference of Science and Technology for Integrated Circuits (CSTIC). Shanghai: IEEE; 2024, pp. 1–3. https://doi.org/10.1109/CSTIC61820.2024.10531928
2. Cui Zh. Nanofabrication: Principles, capabilities and limits. 2nd ed. Cham: Springer; 2017. xvii, 432 p. https://doi.org/10.1007/978-3-319-39361-2
3. Kim I., Park S. J., Jeong Ch., Shim M., Kim D. S., Kim G.-T., Seok J. Simulator acceleration and inverse design of fin field-effect transistors using machine learning. Sci. Rep. 2022;12:1140. https://doi.org/10.1038/s41598-022-05111-3
4. Yamaguchi T., Namatsu H., Nagase M., Yamazaki K., Kurihara K. A new approach to reducing line-edge roughness by using a cross-linked positive-tone resist. Jpn. J. Appl. Phys. 1999;38(12S):7114. https://doi.org/10.1143/JJAP.38.7114
5. Chen H., Xie L., Wei L., Shu Zh., Qiu B., Pei Zh. Line edge roughness modeling for continuous time-space resist simulations. In: 2024 2nd International Symposium of Electronics Design Automation (ISEDA). Xi’an: IEEE; 2024, pp. 579–586. https://doi.org/10.1109/ISEDA62518.2024.10617720
6. Kao M.-Y., Kam H., Hu C. Deep-learning-assisted physics-driven MOSFET current-voltage modeling. IEEE Electron Device Lett. 2022;43(6):974–977. https://doi.org/10.1109/LED.2022.3168243
7. Vici A., Degraeve R., Kaczer B., Franco J., Van Beek S., De Wolf I. A multi-energy level agnostic simulation approach to defect generation. Solid-State Electron. 2021;184:108056. https://doi.org/10.1016/j.sse.2021.108056
8. Church J., Meli L., Guo J., Burkhardt M., Mack C. A., De Silva A. et al. Fundamental characterization of stochastic variation for improved single-expose extreme ultraviolet patterning at aggressive pitch. J. Micro/Nanolithogr. MEMS MOEMS. 2020;19(3):034001. https://doi.org/10.1117/1.JMM.19.3.034001
9. Yoon M. Y., Yeom H. J., Kim J. H., Jeong J.-R., Lee H.-C. Plasma etching of the trench pattern with high aspect ratio mask under ion tilting. Appl. Surf. Sci. 2022;595:153462. https://doi.org/10.1016/j.apsusc.2022.153462
10. Lee G. H., Hwang S., Yu J., Kim H. Architecture and process integration overview of 3D NAND flash technologies. Appl. Sci. 2021;11(15):6703. https://doi.org/10.3390/app11156703
11. Lu S., Yang K.-M., Zhu Y., Zhang M., Wang L.-J., Hu C.-X. Analysis and controller design of fringe phase locking system for interference lithography. Acta Photonica Sinica. 2017; 46(1):123001.
12. Wei W.-Q., He A., Yang B., Wang Z.-H., Huang J.-Z., Han D. et al. Monolithic integration of embedded III-IV lasers on SOI. Light Sci. Appl. 2023;12:84. https://doi.org/10.1038/s41377-023-01128-z
13. Hsieh T.-Y., Hsieh P.-Y., Yang C.-C., Shen C.-H., Shieh J.-M., Yeh W.-K., Wu M.-C. Single-grain gate-all-around Si nanowire FET using low-thermal-budget processes for monolithic three-dimensional integrated circuits. Micromachines. 2020;11(8):741. https://doi.org/10.3390/mi11080741
14. Tang S., Yan J., Zhang J., Wei S., Zhang Q., Li J. et al. Fabrication of low cost and low temperature poly-silicon nanowire sensor arrays for monolithic three-dimensional integrated circuits applications. Nanomaterials. 2020;10(12):2488. https://doi.org/10.3390/nano10122488
15. Wang S., Li L., Zheng S., Das P., Shi X., Ma J. et al. Monolithic integrated micro-supercapacitors with ultra-high systemic volumetric performance and areal output voltage. National Science Review. 2023;10(3):169–177. https://doi.org/10.1093/nsr/nwac271
16. Zheng Y.-Q., Liu Y., Zhong D., Nikzad S., Liu S., Yu Z. et al. Monolithic optical microlithography of high-density elastic circuits. Science. 2021;373(6550):88–99. https://doi.org/10.1126/science.abh3551
17. Fujimori T. How to improve “chemical stochastic” in EUV lithography? In: 2020 China Semiconductor Technology International Conference (CSTIC). Shanghai: IEEE; 2020, pp. 1–3. https://doi.org/10.1109/CSTIC49141.2020.9282490
18. Fujimori T. How to reduce the stochastic issue in EUV lithography. IWAPS 2020: 4th International Workshop on Advanced Patterning Solutions (Nov. 5–6, 2020). Available at: https://picture.iczhiku.com/weixin/message1604029559308.html (accessed: 28.07.2025).
19. Fujimori T. Negative-tone imaging (NTI) process for ArF immersion and EUV lithography to improve “chemical stochastic”. In: 2021 International Workshop on Advanced Patterning Solutions (IWAPS). Foshan: IEEE; 2021, pp. 1–3. https://doi.org/10.1109/IWAPS54037.2021.9671060
20. Bhattarai S., Chao W., Aloni Sh., Neureuther A. R., Naulleau P. P. Analysis of shot noise limitations due to absorption count in EUV resists. Proc. SPIE. 2015;9422:942209. https://doi.org/10.1117/12.2087303
21. Fujimori T. The status of stochastic issues – Photon stochastic and chemical stochastic. MNC 2021, Symposium A (Oct. 27 and Oct. 28). Available at: http://imnc.jp/2021/symposium-a/ (accessed: 28.07.2025).
22. Park Jin, GoChaWon, Huynwoo Kim. Method for forming patterns of a semiconductor device. Patent South Korea, KR102233577B1, 30.03.2021.
23. Gronheid R., Singh A., Knaepen W. Lithographic mask layer. Patent US, US10824078B2, 03.11.2020.
24. Chow Xian, Ansari Naveed, Kimura Yoshie, Lee Sai-I-I, Sultana Kazi, Mani Radhika et al. Atomic layer deposition and etching to reduce roughness. Patent Japan, JP7399864B2, 18.12.2023.
25. Кульпинов М. С., Путря М. Г., Голишников А. А., Крупкина Т. Ю. Способ формирования фоторезистивной маски. Патент РФ, 2827959, 30.05.2024. EDN: MIZJTJ.
Kulpinov M. S., Putrya M. G., Golishnikov A. A., Krupkina T. Yu. Method of forming photoresist mask. Patent RF, 2827959, 30.05.2024. (In Russ.).