Persons

The problem of analyzing and evaluating the structure of FPGA routing resources at early stages of the design flow presents great interest for researchers. Until now, an approach, consisting in passing the full design flow (logic synthesis, placement, routing) on a set of the test circuits with subsequent estimation of various parameters for each FPGA architecture being analyzed, had been dominant. Despite the high accuracy, this approach has a long runtime and requires lots of computing resources, as well as CAD tuned to the analyzed FPGA architecture. Modern FPGA contain more than a million logical gates, therefore, the application of such approach is inefficient. Today, more attention is paid to the development of various models, which allows to evaluate the structure of the routing resources at early stages without using the benchmark circuits. In this work an overview of the existing models and methods for analyzing the structure of FPGA routing resources has been presented. A comparison of the methods and models has been performed, the estimation of their efficiency and possibility of application for designing domestic FPGA has been made. It has been found that the most optimal approach for analyzing of arbitrary structures of the routing resources FPGA is the development and application of mixed methods. This will allow to obtain the accurate models as well as to significantly reduce the development and market entry time.

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The existing means for designing automation are oriented, mainly, at technologies of western manufactures. As a result, a need in adaptation of available methods and means of designing the reconfigurable systems on chip and development of domestic specialized CAD devices for solving the actual tasks in this field appears. The methods for solving the interconnect routing problems combined with the logical resynthesis, considering the architecture of the reconfigurable system-on-chip (RSoC) based on FPGA of Almaz-14, have been proposed. In the chip the developers from JSC «NIIME» and PJSC «Micron» have created an extensive configuration options having no foreign analogs. The availability of a wide range of additional elements for configuring as well as the capabilities of logical resynthesis of the FPGA Almaz-14 microcircuit leads to the necessity of developing the new methods for routing the interconnects, which could take into account and use these architectural features. The efficient algorithm of automatic routing of interconnects for RSoC based on FPGA of Almaz-14 series based on the algorithm A*, of the modification of a classical algorithm of searching for the shortest path on graph, the Dijkstra’s algorithm, including the model of the mixed commutation graph, has been developed. For description of the variety of additional switching elements a special generalized mathematical model as well as a special command interface in Tcl language, which includes a list of configuration elements, their description and functionality, has been developed. The of result of the work is an improvement of the automated design efficiency using the developed and implemented in C language for optimal use of the configurations and route elements of FPGA, as well as of the mechanisms for the full and correct routing of interconnects.

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