The circuits of EEPROM and Flash memory sense amplifiers have been considered. Their classification and analysis have been carried out. An option of the sense amplifier circuit with the best set of parameters for sensitivity, speed and noise, tempera...
The logic and timing analysis problems for design and optimization of VLSI IP-blocks have been considered. A new logic-timing simulation approach, which uses the interval estimation, has been proposed for CMOS circuits. The proposed approach unites t...
The feedback implementation method based on the application of the gate comparator and the control of the charge, flowing through inductivity during switching the power key, as well as the method of study on similar devices, which is based on the ana...