The power consumption in the up-to-date integrated circuits is significantly determined by the length of conductors delivering the instructions and the data to functional devices. This peculiarity of the integrated circuits is taken into account when developing the architectures of power-efficient processor chips. The manycore processors with the special-purpose architecture, designed for building the computer complexes to solve the problems in various subject areas have been considered. The trends in the architectures of manycore processors for searching for the approaches to designing the special-purpose computing complexes based on the new ASICs with massive-parallel architecture at the chip level have been revealed. It has been shown that an important role in improvement of the effectiveness of manycore processors belongs to the specialization of functional abilities of cores, which makes possible to refuse from the support of the operations, which require using computers with large area. The tendency of using the hierarchy of processor cores on a chip in the form of the local groups, connected with the on-chip network has been revealed, which corresponds to the requirements of the technological processors with 28 nm norms and less with limiting the area of synchronous step network. The specialization while building the high-effectiveness of manycore processors permits to decrease the area of the computer unit and, thus, to increase the number of the cores on chip. The local memory of cores, multiplication units and support of the floating point calculations are the main units, determining the chip area. Therefore, the designing of the architecture at early stages of the development must be executed considering the requirements of the subject area for these devices and types of operation.
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