Persons

Nowadays, the developed mathematical models, describing the degradation mechanism of the gate dielectric, permit to determine the value of the operating time to failure of a device depending on its internal properties and operating conditions. These models significantly reduce the time and material required for performing testing and processing of large amounts of experimental data. In the paper the gate dielectric gates based on SiO in n -and p -channel MOS transistors have been studied. It has been found that under the impact of the electric field the degradation of the gate dielectric with 5.3 nm thickness most likely occurs according to the thermochemical model ( E -model) and in case with 7 nm thickness dielectric- in accordance with the anode hole injection model (1/ E -model). The coefficients have been calculated and the analysis of the mathematical models, permitting to determine the service life gate dielectrics based on SiO with 7 nm thickness in n - and p -channel MOS transistors for different values, of their area, operating voltage and temperature, has been performed. This study can serve as a method for monitoring and determining the quality of the gate dielectrics of manufactured MOS transistors.

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A new method for determining the electromigration parameters - the activation energy and the current density exponent has been proposed. The multilayer conductors TiN/Al-Si(1%)/TiN for the tests with SiO passivation layer have been used. The method permits to accelerate and to reduce the price of electromigration tests due to the lack of need for packing the samples and for using the high temperature climatic chambers.

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