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Head of the Research Laboratory “Energy-efficient systems on a chip”, National Research University of Electronic Technology (Russia, 124498, Moscow, Zelenograd, Shokin sq., 1)
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The characteristics of the known IP-cores of the Fast Fourier transform module as well as its basic building blocks have been analyzed. The problems of creating a fully independent platform HDL-description of this module for the FPGA-based, semicustom or custom integrated circuits have been identified. The approach to development of a universal HDL-description based on the platform independent control unit and adopted to the platform main structural blocks has been proposed.
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