Methods are required that can continuously increase the productivity and energy efficiency of semiconductor products and at the same time reduce the occupied minimum crystal area while maintaining its functionality to develop the growth rate of the modern microelectronics market. Therefore, at present, the tasks of integrating non-volatile elements - memristors into the well-known CMOS technology (complementary metal-oxide-semiconductor structure), of creating synthesis methods for the mentioned technology with memristor functional units (MeMOP-logic) are very relevant. A block method for the synthesis of hybrid MeMOS circuits has been presented. This method uses minterm maps, which allows synthesizing the MeMOS circuit and its optimization. The method has been presented on examples of the synthesis of combinational (XOR gate) and sequential (RS-trigger) circuits. The present work is devoted to the review of existing and the proposal of new options for solving synthesis problems of combinational and sequential integrated circuits with memristors. It has been shown that the average power dissipation of the RS -trigger is 7.7 mW for standard logic and 2.2 mW for logic on memristors. The power consumption of the circuit Excluding OR equal to 13 mW for standard logic and 9.2 mW for logic on memristors.