The problem of improving the performance of microprocessors and microcontrollers is solved by the production technology improvement as well as further development of their architecture. In development of the up-to-date high performance microprocessors and microcontrollers the specific feutures of the RISC-architecture are borrowed complicated operations, which include the calls of the subprograms and maintenance of breaks, are difficult to be realized from the point of view of the software during an equal to all the rest time interval commands. While executing, such operations assume writing down the addresses of transfer to the register of the program counter of the processor with simultaneous storage of the return register from the processor program counter. In the work a specific construction of the processor software stack, allowing executing complicated machine operations during one step has been proposed. It has been determined that the required technical result can be achieved by introducing into the processor construction the N identical software counters, in fact being the analogs of the stack registers. It has been shown that the stack indicator with the logic of the register choice, which is connected with the block of the program counters activates while calling a subprogram or maintaining the break the next counter at the time when the previous counter stores the return address from the subprogram. As the result the procedures of storing the address and the recovery of its state from the stack are excluded. This enables the subprogram call or the transfer by the break vector and execution of the return to the call point during one step of the setting generator. Due to this it becomes possible to increase the processor speed while executing 30-50% of similar operations and to improve its performance as a whole without increasing the clock frequency.