Due to reduction of the technological process in production of the integrated circuits the effects related to MOSFET location show strong influence on the MOSFET characteristics. Therefore, it is important to consider these effects at the design stage. In the work the influence of the of the well proximity effects has been studied, the parameter f , characterizing the WPE contribution, has been introduced. The mathematical model of the influence of the WPE effect on the MOSFET characteristics in the current mirror has been built. The simulation with different MOSFET location relative to the well boundary has been performed. To confirm the obtained model, its comparison with the model, based on the results of testing real MOSFETs in the automatic design testing Cadence Virtuoso, has been made. During the experiment the symmetry of the current mirrors, i.e. the difference between the input and output currents in percent from an average value, has been studied. The experimental results have demonstrated the qualitative and quantitative correlation of empirical dependence and of the dependence obtained by calculations on a new model. This will permit to solve the problem of the WPE effect compensation.
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