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The performance of systems in package(SiP) for digital signal processing depends considerably on the speed of data exchange between chips inside the system. One of the problems limiting the data exchange speed is the phase jitter. In this work, power supply net impedance effect on phase jitter during data transmission between processors inside a SiP is considered. An approach to determining a phase noise amplitude based on a SiP functioning simulation with IBIS models of transceivers and S-parameters of package topology is proposed. It has been established that using of filter capacitors enclosed in SiP and providing low impedance of a power supply net at a transceivers operating frequency and its harmonics allows substantial reduction of phase jitter level. It was demonstrated that the best results can be achieved if the capacitors are selected based on the results of the package simulation in CAD.
  • Key words: phase jitter, power supply nets, system in package, SiP, filter capacitor
  • Published in: INTEGRATED RADIOELECTRONIC DEVICES
  • Bibliography link: Korshunov A. V., Shchuchkin E. Yu. Phase noise reduction in SiP systems by dynamic impedance optimization of power supply nets. Izv.vuzov. Elektronika = Proc. Univ. Electronics. 2025;30(4):469–477. (InRuss.).https://doi.org/10.24151/1561-5405-2025-30-4-469-477.
  • Financial source: the work has been supported by the Russian Science Foundation (grant no. 23-29-00518), https://rscf.ru/en/project/23-29-00518/
Andrey V. Korshunov
National Research University of Electronic Technology (Russia, 124498, Moscow, Zelenograd, Shokin sq., 1)
Evgeny Yu. Shchuchkin
National Research University of Electronic Technology (Russia, 124498, Moscow, Zelenograd, Shokin sq., 1); “ICC Milandr”JSC (Russia, 124498, Moscow, Zelenograd, Georgievsky Ave, 5)

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